Resistive random access memories (RRAM) are today the subject of considerable attention, particularly on account of their low electrical consumption and their high operating speed.
A resistive type memory cell has at least two states: a High Resistance State (HRS), also known as “OFF” state, and a Low Resistance State (LRS) or “ON” state. It may thus be used to store binary information.
Three types of resistive memories may be distinguished: memories based on thermochemical mechanism, memories, based on valence change, and memories based on electrochemical metallisation.
The field of the present invention more particularly relates to this latter category based on ionic conduction materials (CBRAM or Conductive Bridging RAM memories). The operation resides in the reversible formation and rupture of a conducting filament in a solid electrolyte, by dissolution of a soluble electrode. These memories are promising by virtue of their low programming voltages (of the order of one Volt), their short programming time (<1 μs), their low consumption and their low integration cost. Furthermore, these memories may be integrated, in the metallisation levels of the logic of a circuit (“above IC”), which makes it possible to increase the integration density of the circuit. From the architectural viewpoint, they only require a selection device, a transistor or a diode for example.
The operation of CBRAM memories is based on the formation, within a solid electrolyte, of one or more metal filaments (also known as “dendrites”) between two electrodes, when these electrodes are taken to suitable potentials. The formation of the filament makes it possible to obtain a given electrical conduction between the two electrodes. By modifying the potentials applied to the electrodes, it is possible to modify the distribution of the filament, and thus to modify the electrical conduction between the two electrodes. For example, by reversing the potential between the electrodes, it is possible to make the metal filament disappear or reduce, so as to eliminate or reduce considerably the electrical conduction due to the presence of the filament.
FIGS. 1A and 1B are schematic diagrams of a memory device 1 of CBRAM type, respectively in the “OFF” state and in the “ON” state.
This device 1 is formed of a stack of Metal/Ion conductor/Metal type. It comprises a solid electrolyte 2, for example based on doped chalcogenide (e.g. GeS) or oxide (e.g. Al2O3). The electrolyte 2 is arranged between a bottom electrode 3, for example made of Pt, forming an inert cathode, and a top electrode 4 comprising a portion of ionisable metal, for example copper, and forming an anode. A portion of ionisable metal is a portion of metal able to form metal ions (here Cu2+ ions), when it is subjected to a suitable electrical potential. The device 1 represented in FIG. 1A or 1B typically forms a memory point, that is to say a unit memory cell, of a memory comprising a multitude of these memory devices.
As indicated previously, the memory state of a CBRAM memory device results from the difference in electrical resistivity between two states: “ON” and “OFF”.
In the “OFF” state (FIG. 1A), the metal ions (here Cu2+ ions for a soluble electrode comprising Cu) coming from the portion of ionisable metal are dispersed throughout the solid electrolyte 2. Thus, no electrical contact is established between the cathode 3 and the anode 4, that is to say between the top electrode and the bottom electrode. The solid electrolyte comprises an electrically insulating zone of high resistivity between the anode and the cathode.
When a positive potential V is applied to the soluble top electrode 4 (the anode), an oxidation-reduction reaction takes place at this electrode, creating mobile ions 5 (FIG. 1A). In the case of a copper electrode 4, the following reaction takes place:Cu→Cu2++2e−.
The ions 5 then move in the electrolyte 2 under the effect of the electric field applied to the electrodes. The speed of movement depends on the mobility of the ion in the electrolyte in question, which guides the choice of the soluble electrode/electrolyte couple (examples: Ag/GeS; Cu/Al2O3, etc.). The speeds of movement of the ions are of the order of nm/ns.
On arriving at the inert electrode 3 (the cathode), the ions 5 are reduced by virtue of the presence of electrons supplied by the electrode 3, leading to the growth of a metal filament 6 according to the following reaction:Cu2+2e−→Cu
The filament 6 grows preferentially in the direction of the soluble electrode 4.
The memory 1 then passes to the “ON” state (FIG. 1B) when the filament 6 enables contact between the electrodes 3 and 4, making the stack conducting. This phase is called “SET phase” of the memory.
In order to pass to the “OFF” state (“RESET” phase of the memory), a negative voltage V is applied to the top electrode 4, leading to the dissolution of the conducting filament. To account for this dissolution, thermal (heating) and oxidation-reduction mechanisms are generally invoked.
Often, the electrolyte 2 contains in the “OFF” state a residual filament 6 in contact with the cathode 3. This comes from the preceding SET phase and has not been dissolved completely during the RESET of the memory. The filament is called residual when it does not establish sufficient electrical conduction between the electrodes to obtain the “ON” state.
Numerous studies are concerned with these CBRAM memories to improve their electrical performance. Among the solutions proposed, in particular may be cited the engineering of the electrolyte (addition of dopants, choice of new materials, annealings, UV treatments, etc.), the engineering of the soluble electrode and the inert electrode or the addition of interface(s) between the electrodes and the electrolyte.
Another area of development relates to the retention of information, that is to say the retention of the “OFF” state and the “ON” state. It is sought to improve the stability of the insulating and conducting states, especially for high operating temperatures.